diff --git a/src/Crypto/cpu.c b/src/Crypto/cpu.c
index 401f524b..90c97416 100644
--- a/src/Crypto/cpu.c
+++ b/src/Crypto/cpu.c
@@ -326,9 +326,12 @@ static BOOL CheckSHA256Support() {
 void DetectX86Features()
 {
 	uint32 cpuid[4] = {0}, cpuid1[4] = {0}, cpuid2[4] = {0};
+	uint32 max_basic_leaf;
 	int leaf7_avx2 = 0;
+	int leaf7_bmi2 = 0;
 	if (!CpuId(0, cpuid))
 		return;
+	max_basic_leaf = cpuid[0];
 	if (!CpuId(1, cpuid1))
 		return;
 
@@ -344,7 +347,7 @@ void DetectX86Features()
       g_hasAVX = (xcrFeatureMask & 0x6) == 0x6;
 	}
 	g_hasAVX2 = 0;
-	g_hasBMI2 = g_hasSSE2 && (cpuid1[1] & (1 << 8));
+	g_hasBMI2 = 0;
 	g_hasSSE42 = g_hasSSE2 && (cpuid1[2] & (1 << 20));
 	g_hasSSE41 = g_hasSSE2 && (cpuid1[2] & (1 << 19));
 	g_hasSSSE3 = g_hasSSE2 && (cpuid1[2] & (1<<9));
@@ -389,13 +392,13 @@ void DetectX86Features()
 		g_cacheLineSize = 8 * GETBYTE(cpuid1[1], 1);
 		g_hasRDRAND = (cpuid1[2] & (1 << 30)) != 0;
 
-		if (cpuid[0] >= 7)
+		if (max_basic_leaf >= 7)
 		{
 			if (CpuId(7, cpuid2))
 			{
 				g_hasRDSEED = (cpuid2[1] & (1 << 18)) != 0;
 				leaf7_avx2 = (cpuid2[1] & (1 <<  5)) != 0;
-				g_hasBMI2 = (cpuid2[1] & (1 <<  8)) != 0;
+				leaf7_bmi2 = (cpuid2[1] & (1 <<  8)) != 0;
 			}
 		}
 	}
@@ -406,17 +409,18 @@ void DetectX86Features()
 		g_cacheLineSize = GETBYTE(cpuid[2], 0);
 		g_hasRDRAND = (cpuid1[2] & (1 << 30)) != 0;
 
-		if (cpuid[0]  >= 7)
+		if (max_basic_leaf >= 7)
 		{
 			if (CpuId(7, cpuid2))
 			{
 				g_hasRDSEED = (cpuid2[1] & (1 << 18)) != 0;
 				leaf7_avx2 = (cpuid2[1] & (1 <<  5)) != 0;
-				g_hasBMI2 = (cpuid2[1] & (1 <<  8)) != 0;
+				leaf7_bmi2 = (cpuid2[1] & (1 <<  8)) != 0;
 			}
 		}
 	}
 	g_hasAVX2 = g_hasAVX && leaf7_avx2;
+	g_hasBMI2 = leaf7_bmi2;
 #if defined(_MSC_VER) && !defined(_UEFI)
 	/* Add check fur buggy RDRAND (AMD Ryzen case) even if we always use RDSEED instead of RDRAND when RDSEED available */
 	if (g_hasRDRAND)