mirror of
https://github.com/veracrypt/VeraCrypt.git
synced 2025-11-11 11:08:02 -06:00
355 lines
7.9 KiB
C
355 lines
7.9 KiB
C
/* cpu.c - written and placed in the public domain by Wei Dai */
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#include "cpu.h"
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#include "misc.h"
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#ifndef EXCEPTION_EXECUTE_HANDLER
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#define EXCEPTION_EXECUTE_HANDLER 1
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#endif
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#ifndef CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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#include <signal.h>
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#include <setjmp.h>
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#endif
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#ifdef CRYPTOPP_CPUID_AVAILABLE
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#if _MSC_VER >= 1400 && CRYPTOPP_BOOL_X64
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int CpuId(uint32 input, uint32 output[4])
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{
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__cpuid((int *)output, input);
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return 1;
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}
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#else
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#ifndef CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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#if defined(__cplusplus)
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extern "C" {
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#endif
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typedef void (*SigHandler)(int);
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static jmp_buf s_jmpNoCPUID;
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static void SigIllHandlerCPUID(int p)
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{
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longjmp(s_jmpNoCPUID, 1);
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}
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static jmp_buf s_jmpNoAESNI;
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static void SigIllHandlerAESNI(int p)
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{
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longjmp(s_jmpNoAESNI, 1);
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}
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#if CRYPTOPP_BOOL_X64 == 0
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static jmp_buf s_jmpNoSSE2;
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static void SigIllHandlerSSE2(int p)
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{
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longjmp(s_jmpNoSSE2, 1);
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}
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#endif
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#if defined(__cplusplus)
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}
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#endif
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#endif
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int CpuId(uint32 input, uint32 output[4])
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{
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#ifdef CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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__try
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{
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__asm
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{
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mov eax, input
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mov ecx, 0
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cpuid
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mov edi, output
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mov [edi], eax
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mov [edi+4], ebx
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mov [edi+8], ecx
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mov [edi+12], edx
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}
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}
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__except (EXCEPTION_EXECUTE_HANDLER)
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{
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return 0;
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}
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// function 0 returns the highest basic function understood in EAX
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if(input == 0)
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return !!output[0]? 1 : 0;
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return 1;
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#else
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// longjmp and clobber warnings. Volatile is required.
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// http://github.com/weidai11/cryptopp/issues/24
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// http://stackoverflow.com/q/7721854
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volatile int result = 1;
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SigHandler oldHandler = signal(SIGILL, SigIllHandlerCPUID);
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if (oldHandler == SIG_ERR)
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result = 0;
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if (setjmp(s_jmpNoCPUID))
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result = 0;
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else
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{
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asm volatile
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(
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// save ebx in case -fPIC is being used
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// TODO: this might need an early clobber on EDI.
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#if CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
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"pushq %%rbx; cpuid; mov %%ebx, %%edi; popq %%rbx"
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#else
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"push %%ebx; cpuid; mov %%ebx, %%edi; pop %%ebx"
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#endif
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: "=a" (output[0]), "=D" (output[1]), "=c" (output[2]), "=d" (output[3])
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: "a" (input), "c" (0)
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);
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}
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signal(SIGILL, oldHandler);
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return result;
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#endif
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}
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#endif
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static int TrySSE2()
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{
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#if CRYPTOPP_BOOL_X64
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return 1;
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#elif defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY)
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volatile int result = 1;
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#if defined (TC_WINDOWS_DRIVER) && !defined (_WIN64)
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KFLOATING_SAVE floatingPointState;
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if (NT_SUCCESS (KeSaveFloatingPointState (&floatingPointState)))
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{
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#endif
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__try
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{
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#if CRYPTOPP_BOOL_SSE2_ASM_AVAILABLE
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AS2(por xmm0, xmm0) // executing SSE2 instruction
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#elif CRYPTOPP_BOOL_SSE2_INTRINSICS_AVAILABLE
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__m128i x = _mm_setzero_si128();
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result = _mm_cvtsi128_si32(x) == 0 ? 1 : 0;
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#endif
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}
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__except (EXCEPTION_EXECUTE_HANDLER)
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{
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result = 0;
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}
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#if defined (TC_WINDOWS_DRIVER) && !defined (_WIN64)
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KeRestoreFloatingPointState (&floatingPointState);
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}
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else
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return 0;
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#endif
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return result;
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#else
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// longjmp and clobber warnings. Volatile is required.
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// http://github.com/weidai11/cryptopp/issues/24
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// http://stackoverflow.com/q/7721854
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volatile int result = 1;
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SigHandler oldHandler = signal(SIGILL, SigIllHandlerSSE2);
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if (oldHandler == SIG_ERR)
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return 0;
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if (setjmp(s_jmpNoSSE2))
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result = 1;
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else
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{
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#if CRYPTOPP_BOOL_SSE2_ASM_AVAILABLE
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__asm __volatile ("por %xmm0, %xmm0");
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#elif CRYPTOPP_BOOL_SSE2_INTRINSICS_AVAILABLE
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__m128i x = _mm_setzero_si128();
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result = _mm_cvtsi128_si32(x) == 0? 1 : 0;
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#endif
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}
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signal(SIGILL, oldHandler);
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return result;
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#endif
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}
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int g_x86DetectionDone = 0;
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int g_hasISSE = 0, g_hasSSE2 = 0, g_hasSSSE3 = 0, g_hasMMX = 0, g_hasAESNI = 0, g_hasCLMUL = 0, g_isP4 = 0;
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int g_hasAVX = 0, g_hasSSE42 = 0, g_hasSSE41 = 0;
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uint32 g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
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VC_INLINE int IsIntel(const uint32 output[4])
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{
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// This is the "GenuineIntel" string
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return (output[1] /*EBX*/ == 0x756e6547) &&
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(output[2] /*ECX*/ == 0x6c65746e) &&
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(output[3] /*EDX*/ == 0x49656e69);
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}
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VC_INLINE int IsAMD(const uint32 output[4])
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{
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// This is the "AuthenticAMD" string
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return (output[1] /*EBX*/ == 0x68747541) &&
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(output[2] /*ECX*/ == 0x69746E65) &&
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(output[3] /*EDX*/ == 0x444D4163);
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}
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#if (defined(__AES__) && defined(__PCLMUL__)) || defined(__INTEL_COMPILER) || CRYPTOPP_BOOL_AESNI_INTRINSICS_AVAILABLE
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static int TryAESNI ()
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{
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volatile int result = 0;
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#ifdef _MSC_VER
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__try
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#else
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SigHandler oldHandler = signal(SIGILL, SigIllHandlerAESNI);
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if (oldHandler == SIG_ERR)
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return 0;
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if (setjmp(s_jmpNoAESNI))
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result = 0;
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else
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#endif
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{
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__m128i block, subkey, ciphered;
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// perform AES round.
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block = _mm_setr_epi32(0x11223344,0x55667788,0x99AABBCC,0xDDEEFF00);
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subkey = _mm_setr_epi32(0xA5A5A5A5,0xA5A5A5A5,0x5A5A5A5A,0x5A5A5A5A);
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ciphered = _mm_aesenc_si128(block, subkey);
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#ifdef _MSC_VER
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if (ciphered.m128i_u64[0] == LL(0x2f4654b9485061fa) && ciphered.m128i_u64[1] == LL(0xc8b51f1fe1256f99))
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#else
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if (((uint64_t*)(&ciphered))[0] == LL(0x2f4654b9485061fa) && ((uint64_t*)(&ciphered))[1] == LL(0xc8b51f1fe1256f99))
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#endif
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result = 1;
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}
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#ifdef _MSC_VER
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__except (EXCEPTION_EXECUTE_HANDLER)
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{
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// ignore error if AES-NI not supported
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}
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#else
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signal(SIGILL, oldHandler);
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#endif
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return result;
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}
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static int Detect_MS_HyperV_AES ()
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{
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int hasAesNI = 0;
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// when Hyper-V is enabled on older versions of Windows Server (i.e. 2008 R2), the AES-NI capability
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// gets masked out for all applications, even running on the host.
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// We try to detect Hyper-V virtual CPU and perform a dummy AES-NI operation to check its real presence
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uint32 cpuid[4];
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char HvProductName[13];
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CpuId(0x40000000, cpuid);
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memcpy (HvProductName, &cpuid[1], 12);
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HvProductName[12] = 0;
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if (_stricmp(HvProductName, "Microsoft Hv") == 0)
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{
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#if defined (TC_WINDOWS_DRIVER) && !defined (_WIN64)
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KFLOATING_SAVE floatingPointState;
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if (NT_SUCCESS (KeSaveFloatingPointState (&floatingPointState)))
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{
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#endif
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hasAesNI = TryAESNI ();
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#if defined (TC_WINDOWS_DRIVER) && !defined (_WIN64)
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KeRestoreFloatingPointState (&floatingPointState);
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}
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#endif
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}
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return hasAesNI;
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}
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#endif
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void DetectX86Features()
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{
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uint32 cpuid[4], cpuid1[4];
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if (!CpuId(0, cpuid))
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return;
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if (!CpuId(1, cpuid1))
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return;
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g_hasMMX = (cpuid1[3] & (1 << 23)) != 0;
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if ((cpuid1[3] & (1 << 26)) != 0)
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g_hasSSE2 = TrySSE2();
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g_hasAVX = g_hasSSE2 && (cpuid1[2] & (1 << 28));
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g_hasSSE42 = g_hasSSE2 && (cpuid1[2] & (1 << 20));
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g_hasSSE41 = g_hasSSE2 && (cpuid1[2] & (1 << 19));
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g_hasSSSE3 = g_hasSSE2 && (cpuid1[2] & (1<<9));
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g_hasAESNI = g_hasSSE2 && (cpuid1[2] & (1<<25));
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g_hasCLMUL = g_hasSSE2 && (cpuid1[2] & (1<<1));
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#if (defined(__AES__) && defined(__PCLMUL__)) || defined(__INTEL_COMPILER) || CRYPTOPP_BOOL_AESNI_INTRINSICS_AVAILABLE
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// Hypervisor = bit 31 of ECX of CPUID leaf 0x1
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// reference: http://artemonsecurity.com/vmde.pdf
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if (!g_hasAESNI && (cpuid1[2] & (1<<31)))
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{
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g_hasAESNI = Detect_MS_HyperV_AES ();
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}
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#endif
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if ((cpuid1[3] & (1 << 25)) != 0)
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g_hasISSE = 1;
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else
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{
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uint32 cpuid2[4];
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CpuId(0x080000000, cpuid2);
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if (cpuid2[0] >= 0x080000001)
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{
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CpuId(0x080000001, cpuid2);
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g_hasISSE = (cpuid2[3] & (1 << 22)) != 0;
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}
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}
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if (IsIntel(cpuid))
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{
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g_isP4 = ((cpuid1[0] >> 8) & 0xf) == 0xf;
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g_cacheLineSize = 8 * GETBYTE(cpuid1[1], 1);
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}
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else if (IsAMD(cpuid))
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{
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CpuId(0x80000005, cpuid);
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g_cacheLineSize = GETBYTE(cpuid[2], 0);
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}
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if (!g_cacheLineSize)
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g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
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*((volatile int*)&g_x86DetectionDone) = 1;
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}
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int is_aes_hw_cpu_supported ()
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{
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int bHasAESNI = 0;
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uint32 cpuid[4];
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if (CpuId(1, cpuid))
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{
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if (cpuid[2] & (1<<25))
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bHasAESNI = 1;
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#if (defined(__AES__) && defined(__PCLMUL__)) || defined(__INTEL_COMPILER) || CRYPTOPP_BOOL_AESNI_INTRINSICS_AVAILABLE
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// Hypervisor = bit 31 of ECX of CPUID leaf 0x1
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// reference: http://artemonsecurity.com/vmde.pdf
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if (!bHasAESNI && (cpuid[2] & (1<<31)))
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{
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bHasAESNI = Detect_MS_HyperV_AES ();
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}
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#endif
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}
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return bHasAESNI;
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}
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#endif
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